Senior Staff Test Engineer Category: Operations Type: FullTimeEmployee Description: Responsible for the development of hardware and software used to test mixed-signal, high-speed digital SOC products on ATE systems. The candidate will be responsible for all aspects from initial product definition through high volume manufacturing. • Early participation in DFT/DFM activities including generation of detailed test plans. Coordinate and lead implementation of test strategies with VLSI, DFT and mixed-signal design teams. • Test vector generation/debug. • New silicon characterization and debug. • Support ATE/bench correlation activities. • Support product engineering in device characterizations/qualifications. • Work closely with product engineering and overseas test facilities on production releases, yield enhancements and test time reductions. Periodic travel may be required. Requirements: The ideal candidate should have experience testing complex mixed-signal SOC devices with high-speed interfaces. Experience with Verigy 93000 ATE is preferred. • BSEE required (M.S. preferred), as well as 10 years of high-speed digital, mixed-signal test engineering experience. • Demonstrated knowledge of SCAN/BIST methodologies, preferably in deep submicron processes. • Experience with test vector generation using Verilog, Synopsys TetraMax, and Mentor FastScan test tools a plus. • Experience testing DDR, PCIe, SATA, USB interfaces • Must possess good organizational skills, good communication skills, teamwork, and initiative. • Must be able to coordinate and work with remote design teams. Location Not specified
Get Started Applying for this Job by entering your email address below.