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For your reference, we have included the original job posting below.
Senior Analog Engineer
Job Number:
26927381
Company Name:
Intel
Job Location:
Bangalore, IN
Job Category:
Information Technology
Senior Analog Engineer
Title: Senior Analog Engineer Location: India-India, Bangalore
Responsibilities Introduction Intel's ASDG HIP (Atom and Soc Development Group) is chartered with defining modular IP standards for SoC architecture, test/validation, and for providing re-useable hard and soft IP blocks for use within multiple SoC product groups. This is part of the SoC Mega-Initiative across Intel. ASDG HIP India is a key site from DDR, Display Port, LVDS, Memory Compiler, VR IP Development for ASDG global. ASDG HIP India is a multifunctional team consists of Circuit Design, Mask Design, Electrical Validation skills.
Job Scope Attend IP PDT regularly and bring update for project team Define each milestone and quality expectation per milestone Track the milestone and remove any road block for team Provide Technical direction to Circuit Team working on specific IP (DDR, PLL, AVReg, Display Port, LVDS, Memory Compiler) Meeting to attend for project execution (Maintain contacts with each Stake holder ) o Meet Process collateral team regularly to understand process learning o Meet DA to maintain enough disk space/tool licenses/resolve flow issues o Run execution meeting every week and get update from team o Plan upfront EV needs, understand lab requirements o Attend Package development meeting o Work with Board team and review board level changes Assign Task to each team member and track their progress o Understand next level assignments from IP owner and ensure each IP is resourceful Own Collateral for IO (This will be delivered by team, but final owner is project lead) o LIB/CAS/SCH/LAY/IBIS/BUMPOUT/IOLEF/DIEFILE The candidate should possess a Bachelor or Master of Engineering degree, or a Master of Science degree in Electrical or Electronics and Communication Engineering with 8-10years of working experience. The candidate should have prior experience and proven track record of managing teams delivering flawlessly to results. Cultivating and leveraging a strong network, developing cross-cultural management capabilities, managing through multiple stakeholders and peer organizations are key requirements for this role. o Knowledge of Advance Analog Circuit Design o Understanding of lab equipments (probes, scopes, automation software) o Prior experience running a cross-site development program o Excellent written and verbal communication skills necessary to lead at all levels of the organization o Proven ability to work across functional groups and organizations o Understanding of the silicon development and validation cycle
