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Listed below are the top 10 out of 1,967 listings that are in the same industry and location as the job you were looking for. To see more than 10 listings, click here to search similar jobs in San Diego, CA


 
 

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To view more listings click here to search Technology Jobs in San Diego, CA


For your reference, we have included the original job posting below.




Senior ASIC Digital IC Design Engineer


Job Number:44162326
Company Name:Confidential Company
Job Location:San Diego, CA Us
Job Category:Information Technology
Salary:Doe


Senior ASIC Digital IC Design Engineer

A growing nationwide company with an office in San Diego, CA is looking for a Senior ASIC / Digital Design Engineer (PMIC) as soon as possible. They are looking for candidates nationwide willing to relocate to the San Diego, CA area. Once again, the position is in the San Diego, CA area. Candidates should have a proven track record of Digital IC Design working with Analog IC Design Engineers and other Digital IC Design Engineers. This is a full time position with solid equity opportunity. Responsibilities: * Work with other Design Engineers and meet the company's objectives* Design and implement digital functions within mixed signal ASICs for Power Management ICs* Do front to back (RTL, synthesis, verification, mixed mode simulation with the analog functions, and test support) in power management PMICs* Initial tasking is to be Real-Time Clocks, I2C Interface and Register Map, and CODEC integrationQualifications Include: * 5-10+ years of experience in Digital Design with at least 5+ years of experience working in Verilog / Synthesis-based ASIC Design, preferably with mixed mode ICs* Experience with front to back (RTL, synthesis, verification, mixed mode simulation with the analog functions, and test support) in power management* PMICS is highly desired* Verilog language and simulation verification experience* Mixed-signal simulation (Cadence AMS) and interfacing with analog functions* Logic Synthesis and Static Timing Analysis* Design for test, scan insertion, ATPG, and Functional Test Vectors* Experience with cell phone PMIC is a plus* Interface with Place and Route and back-annotated simulation verification* You must have taken at least 2 ASICs through the entire flow of specification to prototypes* Must have the knowledge and capability to execute the entire design process without significant assistance; as most all other Engineers at this location are Analog Designers For consideration, please send your resume to Paul Montoya at today!



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