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For your reference, we have included the original job posting below.
Sr. Principal Physical Design Engineer
Job Number:
44161525
Company Name:
Confidential Company
Job Location:
Phoenix, AZ Us
Job Category:
Information Technology
Salary:
$120K - $150K
Sr. Principal Physical Design Engineer
A growing small to medium size nationwide semiconductor company is looking for a Principal Physical Design Engineer. We are looking for candidates nationwide willing to relocate to the Phoenix, AZ Metropolitan area. Once again, the position is in the Phoenix, Arizona area. We are working directly with the Hiring Manager! Key Responsibilities: * Be responsible for driving and executing the back-end methodology from product inception through tape-out including block and chip-level floor planning, placement, scan-reordering, clock tree synthesis, in-place optimization, routing, timing analysis / closure, ECO tasks (timing, functional, and noise-based ECOs) and DRC / LVS / DFM checks* Define and evolve back-end low-power design methodology in 40nm technology to support aggressive low-power techniques for chips having multiple power-domains and dynamic voltage-scaling* Automate, improve, and maintain implementation methods making the physical design cycle predictable and keep abreast with industry trends / tools and methodologies* Integration of analog and RF-macros using their library models and closing timing at the interface level* Provide technical direction, mentoring; and enhance skills within the Physical Design Team* Interface with Design and Program Managers to define schedule, resource requirements, and track back-end scheduleRequired Skills:* Around 10+ years of Physical Design experience with a BS Degree required and an MS Degree being preferred* A strong background of deep sub-micron CMOS IC physical design including floor planning, P/R, CTS, IR Drop Analysis, extraction, and timing closure with Signal Integrity* Proven track record of leading multiple product tape-outs with at least one using low-power methodology having multi-VDD or switchable voltage-domains* Hands-on experience and detailed knowledge of Cadence (preferred), Synopsys, or Magma Physical Design-tools* Expertise in scripting languages like Perl, TCL, AWK, Shell etc.* Must be a team player with excellent verbal and written communication skills Desired Skills: * A background in physical design of ASICs with embedded processors like ARM* Experience with wireless technologies like GPS / BT / WiFi* Experience with the TSMC 65 / 40nm Process For consideration, please send your resume to today!
