Open-Silicon Thriving And Hiring In Downturn

Technology Staff Editor
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SAN JOSE, Calif. -- Faced with the ongoing IC downturn, chip makers are cutting jobs, slashing forecasts and beginning to spill red ink. Not at Open-Silicon Inc. (Milpitas, Calif.). After obtaining some funding in 2008, the privately-held fabless ASIC house has seen its fortunes rise and is bucking the trend amid the downturn. The company claims that it is seeing growth, grabbing new customers and is even hiring in select regions, namely in India and Taiwan. Open-Silicon is also expanding its intellectual-property (IP) and technology offerings and is gearing up for the 45-/40-nm ASIC era. And it appears that the company can weather the economic storm. Early last year, Bahrain's Unicorn Investment Bank B.S.C. acquired a 75 percent stake in Open-Silicon for $190 million. "Business is booming,'' said Naveed Sherwani, the upbeat co-founder, president and CEO of Open-Silicon. "We seem to be enjoying the windfall of the current recession.'' Fabless ASIC houses like Open-Silicon and others claim they can develop and manage an ASIC project at a less expensive rate than if customers did it themselves. It can manage and supervise an ASIC project from design, manufacturing, packaging and final test. Fabless ASIC houses do not own fabs, but rather they rely on foundries. But like all ASIC houses, the fabless group develops their own IP and other technologies. In the current economic downturn, a growing number of companies are embracing the fabless ASIC model. The problem at many companies is resources, especially within ASIC design teams, which are under pressure to maintain their product schedules, Sherwani said. Even though the IC industry is experiencing layoffs amid the downturn, companies are not standing still and are moving forward with their next-generation designs, he said. Faced with waning resources and lack of expertise in outsourcing, Open-Silicon claims it can help chip makers and OEMs in tough times. ''In my career, I have not seen (the industry) this bad," he told EE Times, ''but (chip design) projects are still happening.'' There are a number of fabless ASIC houses in the market, including Altera, eASIC, eSilicon, Faraday, Global Unichip, Open-Silicon and others. Still, the overall ASIC market is dominated by the integrated device manufacturers (IDMs), such as TI, IBM, STMicroelectronics, NEC, Freescale, Sony, Toshiba, Renesas and others. For years, chip makers and OEMs dealt with IDM ASIC vendors, considered the traditional approach in custom design. IDM ASIC vendors have their own fabs, EDA tools, and, in some cases, internal design teams. The IDMs dismiss the fabless ASIC model, saying it is simply not practical. The fabless model did indeed take much longer to get off the ground than previously thought, but now vendors appeared to have made the right bet. Many IDM ASIC vendors are struggling and losing money. The problem with the IDMs is that they have huge overheads, especially in running a costly fab. And, of course, ASICs have become increasingly expensive. In terms of fab overhead, fabless ASIC house has an advantage. ''We're a leaner and meaner version of the ASIC competition,'' Sherwani said. On the other hand, IDM ASIC houses may have an advantage in bleeding-edge designs and bringing design and manufacturing teams under one roof. Overall, though, there is room in the market for both IDM and fabless ASIC houses. In any case, the fabless ASIC model is alive and thriving. Privately-held Open-Silicon did not disclose its sales, but Taiwan's Global Unichip Corp. reported revenue of NT$9.282 billion ($278.8 million) in 2008, up 33 percent over 2007. Global Unichip, which claims to be the world's largest fabless ASIC vendor, reported sales of NT$2.291 billion ($68.8 million) in Q4 of 2008, down 9 percent sequentially but up 13 percent year-over-year. Fabless ASIC houses are not insulated from the downturn. Another public company, Taiwan's Faraday Technology Corp., said sales were down 26.5 percent in December. Global Unichip is closely aligned and uses foundry services from TSMC. The silicon foundry giant is an investor in Global Unichip. For the most part, Altera Corp. and eSilicon Corp. basically use TSMC as its main foundry. In contrast, Faraday is aligned with Taiwan rival UMC. Open-Silicon takes another approach. In 2003, the company was established by former members of Intel, Synopsys and other firms. A year later, Open-Silicon unveiled the OpenModel, an ASIC development process. Unlike traditional ASIC vendor models--which do not permit customers to make supply chain decisions--OpenModel allows customers to make informed choices that lower cost and reduce risk at each step of the ASIC implementation process. Customers can chose from Open-Silicon's broad portfolio of qualified semiconductor IP firms and strategic partnerships with manufacturing, test, and packaging providers. ''My research team and I surveyed more than 60 ASIC customers and found that most were frustrated with high costs, schedule slippages, lack of visibility into the design and manufacturing process, and the high rate of chips that didn't work the first time--issues that simply should not exist at this stage of the ASIC industry's maturity,'' Sherwani said at the launch of OpenModel in 2004. Open-Silicon has relationships with all of the major foundries, but it basically works with three vendors: TSMC for the high-end; Samsung for consumer chips; and Semiconductor Manufacturing International Corp. (SMIC) for low-cost. The fabless ASIC house also has a prudent strategy in process technology. "We do not want to be on the bleeding edge,'' he said. "We want to be one process technology behind.'' At present, Open-Silicon is focusing on 65-nm projects, with 45-/40-nm in R&D. What's driving the company's growth is not the leading-edge of design, but rather what Sherwani calls ''derivative work.'' For instance, a customer develops a leading-edge design, where the ''architectural risk is taken out of a chip,'' he said. Then, the customer asks Open-Silicon to help develop and manage ''derivative chips.'' The strategy is working. Open-Silicon has grown from 20 employees in 2003 to 140 today. The company, which devises some 35 ASICs per year, said sales were up 50 percent year-over-year in Q3 of 2008. ''Q4 was one of our largest quarters,'' he said. "In 2009, we are definitely going to grow.'' Some businesses will grow faster than others. Like most ASIC houses, Open-Silicon derives its sales from two basic areas: NRE and silicon. NRE or non-recurring engineering are the up-front costs in the design phases of a project. Silicon revenues occur when an actual ASIC project goes into production and an ASIC vendors collects a fee or royalty for every unit shipped. In 2009, the NRE business will grow at Open-Silicon, as many companies are scrambling to devise the designs in anticipation of an eventual upturn. But the silicon business is not expected to thrive in 2009, as many of those final ASIC projects will not ship until the industry recovers, possibly in 2010. Until then, it could be a brutal market for the ASIC industry as a whole. Some think that the industry is ripe for more consolidation. Others wonder which companies will remain standing at the end of the downturn. All ASIC houses will need to differentiate themselves to help them survive and attract new customers for good reason. ASIC design starts have been dwindling over the years, but chip complexity is still growing. ASSPs, FPGAs and other types of designs threaten ASICs. Still, Open-Silicon appears to be in fighting shape, thanks to a huge infusion of capital and some new technology announcements. In 2007, the company rolled out a multi-layer mask program in an effort to reduce photomask costs. Also in 2007, Zenasis Technology, a provider of transistor-level optimization tools for IC design, sold its IP assets to Open-Silicon. Open-Silicon will use Zenasis' technology to try to bridge the gap between custom and ASIC design. "One outstanding problem in the ASIC industry is that we do not have the speed from microprocessor cores to build the next generation ASIC," Sherwani at the time of the announcement. "One obvious application is to use this technology to get that speed." Then, in November of 2008, Open-Silicon introduced new technologies to address design issues common to the 65- and 40-nm nodes. Depending on customer needs, Open-Silicon will use the PowerMAX, CoreMAX and VariMAX technologies to build better custom silicon by designing in lower power, increased performance and managed process variability, the company said. Open-Silicon said CoreMAX was created to build the fastest processor cores in the ASIC world. The technology comes out of the Open-Silicon acquisition of Zenasis and uses more than two million lines of C++ software and several patented techniques to move beyond the limitations of traditional library-based ASIC design. Built-in CoreMAX functions include design Boolean analysis and optimization, static timing, cell placement, route estimation, and simultaneous optimization at the logical, physical, and transistor levels, Open-Silicon said. VariMAX addresses increasing process variability with a back biasing design approach where the bulk transistor node voltage is controlled so that fast, leaky parts are reined in by adaptive calibration of the silicon, Open-Silicon said. PowerMAX emphasizes low power. Open-Silicon said it has already completed state-of-the-art 65-nm designs using power savings methods like low-power place-and-route, voltage islands, power gating, clock gating, and multi-Vt. PowerMAX adds to this foundation with four new technologies: transistor level transformations, back biasing, power recovery, and custom leakage signoff, the company said.

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