Analog Layout Engineer

Job Description

A client is enhancing their domestic ASIC capabilities for commercial, defense, and security customers, by delivering relevant, innovative and affordable microelectronics solutions. They are seeking talented a Analog Layout Engineer to join their team. Job responsibilities include:

-Designing complex layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies

-Reviewing and analyzing floorplans and complex circuits with circuit designers

-Working with circuit designers to plan work and negotiate any necessary layout tradeoffs

-Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout

-Implementing analog layouts to achieve specific attributes such as tight matching, low noise, and low power consumption. Layouts may include analog blocks, resistors, capacitors, pad IOs, ESD structures, etc.

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to ~~~ .

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Skills and Requirements

-4+ years of experience in analog layout design

-Experience working in Cadence tools

-Experience interpreting LVS, DRC and ERC reports

-Experience working closely with the circuit design team

-Experience utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent performance, area and power requirements

-Have advanced node experience- 90 nanometers or below

-FinFET experience

-Experience implementing analog layouts like analog blocks, resistors, capacitors, pad IOs, ESD structures, etc.

-Custom and standard cell based floor-planning and hierarchical layout assembly

-Understanding techniques for managing IR drop, RC delay, electromigration, self-heating and coupling capacitance.

-Recognizing and preventing failure prone circuit and layout structures

-Analog and DFM best practices

-Excellent communication skills and able to work with cross-functional teams

-Must be willing and able to obtain US security clearance upon starting this role. null

We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal employment opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment without regard to race, color, ethnicity, religion,sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military oruniformed service member status, or any other status or characteristic protected by applicable laws, regulations, andordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request to ~~~.