Sr. Engineer - Process Integration

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

If you are excited about driving the future of cutting-edge memory technology, Passionate about driving the roadmap of future compute and memory systems, Interested in joining a world class team and the world leader in DRAM technology, then, we have an interesting opportunity for you. We are looking for a Sr Engineer on Micron Technology's TD team, you will manage the reticle flow from creation through design definition and verification to final fab integration. Working in Micron's Technology and Products Group (TPG), the Sr. Engineer with Reticle focus manages projects to facilitate the efficient and successful tapeout of masks working cross-functionally with Design, Process Integration, OPC, Scribe, Modeling, Lithography, Tapeout Operations, Mask Shop and Fab. A pro-active approach is needed to ensure that masks go out on time, while minimizing/eliminating re-works. Strong collaboration and interpersonal skills are required to interpret the various reticle requests spanning critical array layouts, overlay marks, test structures, and process enhancements.

The successful candidate will have the foundation to develop technical semiconductor knowledge and project management. This role is driven by delivering quality time to market reticle enhancements for Micron projects supporting Technology Development.

Responsibilities include, but are not limited to the following:

• Develop/Initiate project plans and reticle requests to enable timely and quality reticle updates

• Facilitate layout, process and reticle change requests

• Define and document reticle update requirements

• Verify quality of layout through DRC, LVS, and other vendor-supplied and in-house verification tools

• Interpret and apply Design Rules and confirm they are checking as intended, applying your knowledge of CMOS process, working with Process customers

• Develop and document layout tools and methodologies to improve quality, working with CAD or through your own coding

• Identify and drive problems to resolution and manage risks

• Facilitate regular meetings with key partners

• Document and report issues to related groups or collaboration site for future improvement

• Build and maintain detailed Starspec input from test structures and generate device target sheets in ESPEC

• Interact with PI engineers on reticle requests, layouts, data reviews, and tapeout processes

• Review reticle specs in TWIT to ensure the reticle type, polarity, stepper type, and wavelength to meet the reticle requirements

• Work with design engineers on experiments and process generators, make recommendations and approve mask data

• Assist on Testchip structure layouts, documentation, and overall reviews

• Generate, review, and submit mask data for DFM evaluations

• Interact with Photo, Metro, RDA, and other PI engineers on scribe/Frame requirement

• Review and approve generated mask data, OPC results, and fractured jobdeck data

• Review compared data at mask gen and fracture steps

• Collaborate with each site's Reticle Coordinators and mask engineers

Successful candidates for this position will have

• Proven track record in project management

• Semiconductor experience covering aspects of Process Integration or Photo or CAD/Layout

• Reticle manufacturing knowledge

• Intermediate understanding of lithography and reticles

• Basic understanding of Optical Proximity Correction (OPC) Methods

• Layout viewer (i.e. K2View) experience; DF2 database layout experience is ideal

• Effective communication and presentation skills in English

• Ability to multi-task with strong organizational skills

• Strong problem-solving skills, with knowledge or experience of 5 whys and G8D

• Semiconductor or similar industry experience with basic understanding of semiconductor manufacturing technologies

• Ability and flexibility to support a multi-cultural spectrum of customers across different time zones (US, Japan, Taiwan, Singapore, India)

• Navigate Uncertainty: be able to work effectively with limited information and supervision

• Fluency in Microsoft Office applications

• Bachelor Degree or higher with equivalent experience in Engineering

As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on ~~~/careers/benefits .

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.